In integrated circuits, there has developed a need for identifying a particular integrated circuit based on some characteristic of the integrated circuit. In the case of memories there is often the capability of repairing a particular memory by using what is commonly known as redundancy. There are included redundant rows and/or columns on the particular integrated circuit memory. If one of the regular rows or columns is defective, a redundant row or column is used to replace the defective one. There has become a desire for knowing if the particular memory is one in which a redundant row or column has replaced a regular row or column. Another identity need is for distinguishing between mask sets. A particular type of memory or other device may be manufacturable from two different mask sets. It is desirable to know from which mask set the device was made. One of the techniques which has been developed for indicating this is having a diode-connected transistor coupled between an input and a power supply terminal. The input can be driven so as to forward bias this diode-connected transistor and current can be detected to identify the integrated circuit as having one characteristic. To identify a second characteristic of the integrated circuit, the diode-connected transistor is decoupled, in the case of redundancy, from the input and/or power supply terminal so that no current flows between the input and the power supply terminal even when the diode-connected transistor is forward biased. For mask set identity, this diode-connected transistor simply is not present so that no current flows. There are any number of different characteristics for which a device may be identified. In the case of redundancy it is desirable to be able to perform the identity function with fuses. In other cases, such as mask identity, the circuit useful for allowing the detection can simply be present or not present. Additionally, more than two characteristics can be distinguished by having more than one input selectively provided with circuitry susceptible to being detected.
A diagram of one such input is shown in prior art FIG. 1. Shown in FIG. 1 is input circuit 10 comprised of an input terminal 11, a PN junction diode 12, a resistor 13, a PN junction diode 14, an N channel insulated gate field effect transistor 15, and a fuse 16. Diode 12 has a first terminal connected to input terminal 11 and a second terminal connected to ground. Diode 12 is such that it is reverse biased by any signal above ground potential. Resistor 13 has a first terminal connected to input terminal 11, and a second terminal connected to a node 17. Diode 14 has a first terminal connected to and distributed across resistor 13, and a second terminal connected to ground. Ordinarily, resistor 13 and diode 14 are in fact one in the same diffused resistor disposed in the substrate so that a diode-type junction is present at all locations. Configurations omitting diode 14 are also well known. In such a case resistor 13 would be an ordinary resistor such as a polysilicon resistor. Diode 14 is connected in the same direction as diode 12 so that diode 14 is also reverse biased for poitive voltage inputs applied to input terminal 11. Transistor 15 has a gate and a drain connected to node 17, and a source. Fuse 16 has a first terminal connected to the source of transistor 15, and a second terminal connected to a positive power supply terminal for receiving a positive power supply voltage such as, for example, 5 volts. Node 17 serves as the input for the internal cicuitry of the integrated circuit, and VDD serves as the positive power supply terminal for the integrated circuit. Diodes 12 and 14 and resistor 13 are for electrostatic discharge (ESD) protection. This type of ESD protection is well known.
Circuit 10 can be used for identifying the integrated circuit as having one of two characteristics. A first charactistic is identified when fuse 16 is not blown. This condition is conveniently detected by bringing input terminal 11 to a voltage sufficiently above VDD so as to forward bias diode-connected transistor 15. With diode-connected transistor 15 forward biased, current will flow between input terminal 11 and VDD. This current can be detected to ascertain that the integrated circuit has the first characteristic. To indicate that the integrated circuit has a second characteristic, fuse 16 is blown to open the circuit between node 17 and VDD. Consequently, application of the forward-baising voltage will not result in current flowing. This absence of current flow can be detected to indicate that the integrated circuit has the second characteristic. For mask set identity or some other identity which can be made part of the mask set, fuse 16 and transistor 15 are simply not present. This is detected in the same manner as if fuse 16 were blown.
The approach of FIG. 1 worked fine until it ESD protection began including another diode which was connected between VDD and the input terminal. This is shown in prior art FIG. 2 which shows an input circuit 10' which is the same as the ESD portion of input circuit 10 of FIG. 1 except that input circuit 10' has an additional PN junction diode 18. The common elements between input circuit 10 and input circuit 10' are numbered the same. Diode 18 has a first terminal connected to input terminal 11, and a second input terminal connected to VDD. Diode 18 is connected so that it is not forward biased until the voltage on input terminal 11 exceeds the voltage at VDD by about 0.6 volt. In order for there to be current flow through a forward biased PN junction, there must be about 0.6 volt across the junction in the forward direction. This is also about the threshold voltage of a typical N channel transistor such as N channel transistor 15 in FIG. 1. Consequently, with a diode such as diode 18 connected between the input and VDD, it is not possible to distinguish between a diode-connected transistor that is coupled or decoupled from VDD because of the presence of diode 18. The difficulty then is to provide a technique for providing identifying information while using ESD protection such as that shown in FIG. 2 where there is a diode to VDD as well as to ground.